Biblio

Found 5 results
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6
Ataei S, Stine JE, Guthaus MR.  2016.  A 64 kb differential single-port 12T SRAM design with a bit-interleaving scheme for low-voltage operation in 32 nm SOI CMOS. Computer Design (ICCD), 2016 IEEE 34th International Conference on.
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Islam R, Guthaus MR.  2017.  CMCS: Current-Mode Clock Synthesis. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25:1054–1062.
Guthaus MR.  2016.  Clock Design and Synthesis. Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology: Circuit Design, and Process Technology. :261.
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Sankaranarayanan R, Guthaus MR.  2017.  Energy Savings and Performance Improvement in Subthreshold Using Adaptive Body Bias. Proceedings of the on Great Lakes Symposium on VLSI 2017.
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Guthaus MR, Stine JE, Ataei S, Chen B, Wu B, Sarwar M.  2016.  OpenRAM: An open-source memory compiler. Proceedings of the 35th International Conference on Computer-Aided Design.